Non-Volatile Memory

Innovations in non-volatile memory with low latency powered by cutting edge materials and device research.

Two different technologies are currently used as the memory accessed by the CPU: SRAM and DRAM. Both are volatile, meaning data stored will be lost when power fails or is turned off. A new class of memory (Persistent or Storage Class Memory, SCM) is being investigated and developed that is non-volatile, i.e., data does not disappear when power is lost.

Technology Highlights

What is Memory Latency

The latency of the memory cell is a measure of the time it takes for the data requested by the CPU to be returned to the CPU;latency varies with application or use case as well as the architecture of the processor and memory. In general, DRAM has a latency in the 15 to 100 nano second range while NAND has latencies in the 80 to 120 microseconds. The gap between the latencies is the target for “Storage Class Memory” (SCM). DRAM is also volatile (data is lost when power is lost), while SCM would be non-volatile that retains data when power is lost. Some designs of non-volatile memory with low latency can compete with DRAM:onetype is MRAM (Magnetoresistive Random-Access Memory). Other technologies have latency between DRAM and SSD, such as PCM (Phase Change Memory) or ReRAM (Resistive Random-AccessMemory). Other technologies and memory cell designs are described in the literature with new and novel cells being investigated at various Universities and Labs across the world.

Western Digital’s Efforts on Non-Volatile Memory

The NVM group within the Western Digital Research team is tasked with evaluation of all the candidate NVMmemory cell designs. Not only must a memory cell hold data, but it must also retain the data for a commercially acceptable time. The speed of the cell must fall into the targeted latencyfor Solutions Content Doc Template7 October 2021SCM, and the lifetime of the cell must meet the requirements for SCM. The cell must be manufacturable using current silicon fabrication equipment, and the technology must be scalable to smaller and smaller nodes if it is to compete in the data storage market. To accomplish this mission,the NVM team has to investigate existing and new materials, fabricate memory cells,and subsequently test those cells and characterize the cellsagainst the target specification for anSCM NVM cell. Promising memory cell technologies need to be optimized, no cell will meet the full specification on first examination, those cellswith promise must be optimized (materials, manufacturing processes, etc.). In addition, the change in cell properties with size must be investigated to determine if the technology is scalable.Once a suitable memory cell has been identified the NVM Research team works with other teams within Western Digital to investigate what would be required to productize the technology and use it to makea product. This requires efforts ranging from integration into an operating system to building a fab to produce the new technology.

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